Field programmable gate array (FPGA) is the product of further development on the basis of programmable devices such as pal (programmable array logic) and gal (general array logic). As a semi custom circuit in the field of application specific integrated circuits (ASIC), it not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of programmable devices.

The mainstream manufacturers of field programmable gate array FPGA chips include Xilinx, Altera, lattice and MICROSEMI, of which the first two have a total market share of 88%.

Field programmable gate array FPGA is a semiconductor device composed of configurable logic block (CLB) matrix connected through programmable interconnection. FPGA can be reprogrammed according to the required application or functional requirements after manufacturing.

This feature is the key to the difference between FPGA and ASIC. You can customize FPGA devices for specific design tasks. Although there are also one-time programmable (OTP) FPGAs on the market, most of them are based on SRAM and can be reprogrammed as the design evolves.

Field programmable gate array FPGA has a very mature and wide range of applications in the aerospace, military, telecommunications fields. Taking the telecommunication field as an example, in the stage of all-in-one telecommunication equipment, FPGA is applied to network protocol parsing and interface conversion because of its programming flexibility and high performance. In the nfv scenario, FPGA based on the general server and hypervisor can achieve a 5-fold performance improvement of the network element data plane, and can be managed and arranged by the openstack cyborg hardware acceleration framework.

In terms of chip design, we need to focus on rationality in algorithm design to ensure the final completion effect of the project, and put forward a solution to the problem according to the actual situation of the project, so as to improve the operation efficiency of FPGA. After the algorithm is determined, the module should be constructed reasonably to facilitate the later code design.

In the code design, we can use the pre designed code to improve work efficiency and reliability. Write the test platform, carry out the code simulation test and board debugging, and complete the whole design process. Unlike ASIC, FPGA has a short development cycle. It can change the hardware structure in combination with the design requirements. When the communication protocol is immature, it can help enterprises quickly launch new products and meet the needs of non-standard interface development.